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<title>device_linaro_bootloader_edk2/CorebootModulePkg, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.replicant.us/mirrors/AOSP/device_linaro_bootloader_edk2/'/>
<entry>
<title>CorebootPayloadPkg/CbSupportPei: Fix the memory map issue</title>
<updated>2016-11-17T22:49:11+00:00</updated>
<author>
<name>Maurice Ma</name>
<email>maurice.ma@intel.com</email>
</author>
<published>2016-11-17T03:22:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.replicant.us/mirrors/AOSP/device_linaro_bootloader_edk2/commit/?id=4e7872d2f71f511df155a9048f06761afce751da'/>
<id>4e7872d2f71f511df155a9048f06761afce751da</id>
<content type='text'>
When coreboot reports memory range across 1MB, the current code
cannot handle it properly. In this case the range should be
adjusted to start from 1MB instead since the memory resource
below 1MB has been preprocessed by CbSupportPei module.

This patch fixed the coreboot + UEFI payload hang issue when
running on QEMU due to incorrect memory map.

Cc: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
Reviewed-by: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When coreboot reports memory range across 1MB, the current code
cannot handle it properly. In this case the range should be
adjusted to start from 1MB instead since the memory resource
below 1MB has been preprocessed by CbSupportPei module.

This patch fixed the coreboot + UEFI payload hang issue when
running on QEMU due to incorrect memory map.

Cc: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
Reviewed-by: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>CorebootModulePkgPkg: Expose FindCbTag API from CbParseLib</title>
<updated>2016-10-27T16:51:16+00:00</updated>
<author>
<name>gdong1</name>
<email>guo.dong@intel.com</email>
</author>
<published>2016-10-27T14:56:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.replicant.us/mirrors/AOSP/device_linaro_bootloader_edk2/commit/?id=3176d84fe807974f38fa95cd18211ad8ee2cb3ea'/>
<id>3176d84fe807974f38fa95cd18211ad8ee2cb3ea</id>
<content type='text'>
CbPlatformSupportLib might use FindCbTag() API to parse
platform specific information. So expose this API.
And add EFIAPI to all functions in CbParseLib.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Dong &lt;guo.dong@intel.com&gt;
Reviewed-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
CbPlatformSupportLib might use FindCbTag() API to parse
platform specific information. So expose this API.
And add EFIAPI to all functions in CbParseLib.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Dong &lt;guo.dong@intel.com&gt;
Reviewed-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>CorebootModulePkg: Fix memmap issue</title>
<updated>2016-10-27T00:11:54+00:00</updated>
<author>
<name>gdong1</name>
<email>guo.dong@intel.com</email>
</author>
<published>2016-10-26T23:48:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.replicant.us/mirrors/AOSP/device_linaro_bootloader_edk2/commit/?id=2d90b74d027b457615c0739ac9114a976be9eaed'/>
<id>2d90b74d027b457615c0739ac9114a976be9eaed</id>
<content type='text'>
Some reserved memory (e.g. CSE reserved memory) might be in the
middle of usable physical memory. The current memory map caculation
could not handle this case. This patch fixed this issue.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: gdong1 &lt;guo.dong@intel.com&gt;
Reviewed-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some reserved memory (e.g. CSE reserved memory) might be in the
middle of usable physical memory. The current memory map caculation
could not handle this case. This patch fixed this issue.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: gdong1 &lt;guo.dong@intel.com&gt;
Reviewed-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>CorebootModulePkg: Add a library to parse platform specific info.</title>
<updated>2016-10-26T22:34:30+00:00</updated>
<author>
<name>gdong1</name>
<email>guo.dong@intel.com</email>
</author>
<published>2016-10-17T21:47:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.replicant.us/mirrors/AOSP/device_linaro_bootloader_edk2/commit/?id=2f20bfd98ee40e241924c31b4e08089b3d688317'/>
<id>2f20bfd98ee40e241924c31b4e08089b3d688317</id>
<content type='text'>
Update CbSupportPei to consume the new library, so platform could provide
platform specific library instance to parse platform specif info.
And add a NULL library instance to pass build.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: gdong1 &lt;guo.dong@intel.com&gt;
Reviewed-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update CbSupportPei to consume the new library, so platform could provide
platform specific library instance to parse platform specif info.
And add a NULL library instance to pass build.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: gdong1 &lt;guo.dong@intel.com&gt;
Reviewed-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>CorebootPayloadPkg DSC: Add build option to disable deprecated APIs</title>
<updated>2016-10-26T21:56:34+00:00</updated>
<author>
<name>Maurice Ma</name>
<email>maurice.ma@intel.com</email>
</author>
<published>2016-10-24T21:34:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.replicant.us/mirrors/AOSP/device_linaro_bootloader_edk2/commit/?id=3f0edb77f6c6b2ae644fac5526febbf3e2fbef73'/>
<id>3f0edb77f6c6b2ae644fac5526febbf3e2fbef73</id>
<content type='text'>
Add the following definition in the [BuildOptions] section in package DSC
files to disable APIs that are deprecated. As a result replaced PcdSet32
with PcdSet32S accordingly to make the build pass.

[BuildOptions]
  *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES

Cc: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=163
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
Reviewed-by: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the following definition in the [BuildOptions] section in package DSC
files to disable APIs that are deprecated. As a result replaced PcdSet32
with PcdSet32S accordingly to make the build pass.

[BuildOptions]
  *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES

Cc: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=163
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
Reviewed-by: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>CorebootModulePkg/SecCore: Adding NASM files in SecCore module</title>
<updated>2016-08-04T00:20:17+00:00</updated>
<author>
<name>Ma, Maurice</name>
<email>maurice.ma@intel.com</email>
</author>
<published>2016-08-02T19:56:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.replicant.us/mirrors/AOSP/device_linaro_bootloader_edk2/commit/?id=365a3aab857a2820d36d2ae9b3b62f06230b295a'/>
<id>365a3aab857a2820d36d2ae9b3b62f06230b295a</id>
<content type='text'>
Ported MASM/GAS assembly files into NASM files and updated the inf
file to refer to NASM files.

This change has been tested with GCC 4.8 and VS2013 build.

Cc: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
Cc: Lee Leahy &lt;leroy.p.leahy@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
Reviewed-by: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Ported MASM/GAS assembly files into NASM files and updated the inf
file to refer to NASM files.

This change has been tested with GCC 4.8 and VS2013 build.

Cc: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
Cc: Lee Leahy &lt;leroy.p.leahy@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
Reviewed-by: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>CorebootModulePkg: Remove unused PCI non-enumeration drivers</title>
<updated>2016-05-27T21:26:16+00:00</updated>
<author>
<name>Maurice Ma</name>
<email>maurice.ma@intel.com</email>
</author>
<published>2016-05-26T18:12:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.replicant.us/mirrors/AOSP/device_linaro_bootloader_edk2/commit/?id=ee70e58bd28a1bd6decf173a98b85c6e7066b486'/>
<id>ee70e58bd28a1bd6decf173a98b85c6e7066b486</id>
<content type='text'>
CorebootPayloadPkg has switched to use the generic PciBus and
PciHostBridge driver form MdeModulePkg. As a result, the
non-enumeration drivers including PciBusNoEnumerationDxe and
PciRootBridgenoEnumerationDxe need to be removed.

Cc: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
Reviewed-by: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
CorebootPayloadPkg has switched to use the generic PciBus and
PciHostBridge driver form MdeModulePkg. As a result, the
non-enumeration drivers including PciBusNoEnumerationDxe and
PciRootBridgenoEnumerationDxe need to be removed.

Cc: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
Reviewed-by: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>CorebootModulePkg/CbSupportDxe: Text only support</title>
<updated>2016-05-23T20:34:03+00:00</updated>
<author>
<name>Leahy, Leroy P</name>
<email>leroy.p.leahy@intel.com</email>
</author>
<published>2016-05-23T15:45:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.replicant.us/mirrors/AOSP/device_linaro_bootloader_edk2/commit/?id=60c809f3621039bb1ac6b4c1947baf5a848814b0'/>
<id>60c809f3621039bb1ac6b4c1947baf5a848814b0</id>
<content type='text'>
Not all platforms have or support graphics.  The ASSERT that the
frame buffer HOB is not NULL is fatal for these platforms.  Convert
this into an if statement and make the related PcdSet* calls c
onditional on locating the frame buffer HOB.

Change-Id: Ibdc4bf5359571f3ce1555efcaf4657b8e363b2cd
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy &lt;leroy.p.leahy@intel.com&gt;
Reviewed-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Not all platforms have or support graphics.  The ASSERT that the
frame buffer HOB is not NULL is fatal for these platforms.  Convert
this into an if statement and make the related PcdSet* calls c
onditional on locating the frame buffer HOB.

Change-Id: Ibdc4bf5359571f3ce1555efcaf4657b8e363b2cd
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy &lt;leroy.p.leahy@intel.com&gt;
Reviewed-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>CorebootModulePkg: Add video resolution PCD initialization</title>
<updated>2016-05-20T17:11:53+00:00</updated>
<author>
<name>Maurice Ma</name>
<email>maurice.ma@intel.com</email>
</author>
<published>2016-05-17T16:30:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.replicant.us/mirrors/AOSP/device_linaro_bootloader_edk2/commit/?id=3aa865685a1292aef17d2efa812376d180fc00f9'/>
<id>3aa865685a1292aef17d2efa812376d180fc00f9</id>
<content type='text'>
The video console resolution related PCDs are required to be
initialized after switching to use the generic BdsDxe driver
in MdeModulePkg.

Cc: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
Reviewed-by: Lee Leahy &lt;leroy.p.leahy@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The video console resolution related PCDs are required to be
initialized after switching to use the generic BdsDxe driver
in MdeModulePkg.

Cc: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
Reviewed-by: Lee Leahy &lt;leroy.p.leahy@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>CorebootModulePkg: Convert TAB to white space for CbSupportDxe driver</title>
<updated>2016-05-20T17:11:52+00:00</updated>
<author>
<name>Maurice Ma</name>
<email>maurice.ma@intel.com</email>
</author>
<published>2016-05-18T19:30:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.replicant.us/mirrors/AOSP/device_linaro_bootloader_edk2/commit/?id=f3a90fbf8b8d816def4be94914295b479f218a1a'/>
<id>f3a90fbf8b8d816def4be94914295b479f218a1a</id>
<content type='text'>
Convert TAB to white space for CbSupportDxe driver.

Cc: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
Reviewed-by: Lee Leahy &lt;leroy.p.leahy@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Convert TAB to white space for CbSupportDxe driver.

Cc: Prince Agyeman &lt;prince.agyeman@intel.com&gt;
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma &lt;maurice.ma@intel.com&gt;
Reviewed-by: Lee Leahy &lt;leroy.p.leahy@intel.com&gt;
</pre>
</div>
</content>
</entry>
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