device_linaro_bootloader_edk2/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c, branch master

ArmVirtPkg/ArmVirtGicArchLib: eliminate unchecked PcdSetXX() calls

2016-10-25T08:46:29+00:00

These are deprecated / disabled under the
DISABLE_NEW_DEPRECATED_INTERFACES feature test macro.

Introduce a variable called PcdStatus, and use it to assert the success of
these operations (there is no reason for them to fail here).

Cc: Ard Biesheuvel 
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=165
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek 
Reviewed-by: Ard Biesheuvel 
Tested-by: Ard Biesheuvel  # RVCT
Reviewed-by: Jordan Justen

ArmVirtPkg/ArmVirtGicArchLib: adapt ASSERT()s to 64-bit base addresses

2016-10-21T08:19:39+00:00

Since All the GIC base address variables has been aligned to 64-bit, it
doesn't make sense to continue use MAX_UINT32 in ASSERT() statement, so
this patch uses MAX_UINTN to adapt to this kind of change.

Contributed-under: TianoCore Contribution Agreement 1.0
Cc: Leif Lindholm 
Signed-off-by: Dennis Chen 
Acked-by: Laszlo Ersek 
Reviewed-by: Ard Biesheuvel

ArmVirtPkg/FdtClientDxe: report address and size cell count directly

2016-09-15T14:31:24+00:00

The FDT client protocol methods dealing with "reg" properties return
the size of a "reg" element. Currently, we have hardcoded this as '8',
since #address-cells == #size-cells == 2 in most cases. However, for
different values, have a single 'reg' element size is not unambiguous,
since - however unlikely - if #address-cells != #size-cells, we do not
know which is which.

So before adding more methods to the protocol, fix up this oversight.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek

ArmPkg ArmPlatformPkg ArmVirtPkg: ARM GICv2/v3 Base Address width fix-up

2016-09-08T08:16:01+00:00

According to the ACPI 6.0/6.1 spec, the physical base address of GICC,
GICD, GICR and GIC ITS is 64-bit. So change the type of the various GIC
base address PCDs to 64-bit, and fix up all users.

Contributed-under: TianoCore Contribution Agreement 1.0
Cc: Leif Lindholm 
Signed-off-by: Dennis Chen 
Reviewed-by: Ard Biesheuvel

ArmVirtPkg/ArmGicArchLib: move to FdtClient protocol

2016-04-11T16:12:21+00:00

Instead of relying on VirtFdtDxe to populate the GIC related PCDs, move
this handling to our implementation of ArmGicArchLib, and retrieve the
required DT info using the new FDT client protocol.

This removes one of the reasons we need to load VirtFdtDxe first using
an 'A PRIORI' declaration in the platform FDF.

As Laszlo kindly confirms:

  So, ultimately, the only user of this library instance is
  "ArmPkg/Drivers/ArmGic/ArmGicDxe.inf". ... Indeed, checking the build
  report file for ArmVirtQemu (AARCH64), I find ArmVirtGicArchLib (and
  ArmGicLib too) only under "ArmPkg/Drivers/ArmGic/ArmGicDxe.inf".

which means that the constructor is only invoked once, and so the dynamic
PCDs are set in time for ArmGicDxe to consume them, and never afterwards.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek

ArmVirtPkg: implement DT-based ArmGicArchLib

2015-07-28T20:45:36+00:00

Since it is arguably incorrect to infer the GIC revision from CPU
ID and GIC feature registers on platforms that describe the GIC in
the device tree, this implements the library class ArmGicArchLib
tailored for such platforms.

The supported GIC revision is retrieved from the dynamic PCD that
is set based on the GIC DT node.

This means this library can only execute post DXE core, but this is
not a problem for any of the virt platforms.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek 
Reviewed-by: Leif Lindholm 
Tested-by: Leif Lindholm 

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18102 6f19259b-4bc3-4df7-8a09-765794883524