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authorMarek Olšák <marek.olsak@amd.com>2019-07-16 23:04:48 (GMT)
committerMarek Olšák <marek.olsak@amd.com>2019-07-20 00:16:50 (GMT)
commit7a764b963a50cfab4a684b492c377d31a669d747 (patch)
tree3be6cacf892a762d9bf639fc3e2925a8c9f47285
parentc741bed6e823afe75edecbb0d0a4c18d785480cd (diff)
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radeonsi: fix compute-based culling regression in 1ce52c1e373
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index f39b7c6..a099805 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -759,7 +759,7 @@ static void si_emit_draw_registers(struct si_context *sctx,
bool primitive_restart)
{
struct radeon_cmdbuf *cs = sctx->gfx_cs;
- unsigned vgt_prim = si_conv_pipe_prim(info->mode);
+ unsigned vgt_prim = si_conv_pipe_prim(prim);
if (sctx->chip_class >= GFX10)
gfx10_emit_ge_cntl(sctx, num_patches);