From 5a8dbdc6b4b8b4b17c807c9bb23807cdc66f6feb Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Wed, 22 Apr 2015 13:57:00 +0800 Subject: mmc: fsl_esdhc: Add adapter card type identification support Add adapter card type identification support by reading FPGA STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function, define CONFIG_FSL_ESDHC_ADAPTER_IDENT. Signed-off-by: Yangbo Lu Cc: York Sun Cc: Pantelis Antoniou [York Sun: resolve conflicts in README.fsl-esdhc] Reviewed-by: York Sun --- drivers/mmc/fsl_esdhc.c | 38 +++++++++++++++++++++++++++++++++++++- drivers/mmc/mmc.c | 6 ++++++ drivers/mmc/mmc_private.h | 3 +++ 3 files changed, 46 insertions(+), 1 deletion(-) (limited to 'drivers/mmc') diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 10ec216d2c..270ec1c1fa 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -694,6 +694,39 @@ int fsl_esdhc_mmc_init(bd_t *bis) return fsl_esdhc_initialize(bis, cfg); } +#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT +void mmc_adapter_card_type_ident(void) +{ + u8 card_id; + u8 value; + + card_id = QIXIS_READ(present) & QIXIS_SDID_MASK; + gd->arch.sdhc_adapter = card_id; + + switch (card_id) { + case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45: + break; + case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY: + break; + case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44: + value = QIXIS_READ(brdcfg[5]); + value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT); + QIXIS_WRITE(brdcfg[5], value); + break; + case QIXIS_ESDHC_ADAPTER_TYPE_RSV: + break; + case QIXIS_ESDHC_ADAPTER_TYPE_MMC: + break; + case QIXIS_ESDHC_ADAPTER_TYPE_SD: + break; + case QIXIS_ESDHC_NO_ADAPTER: + break; + default: + break; + } +} +#endif + #ifdef CONFIG_OF_LIBFDT void fdt_fixup_esdhc(void *blob, bd_t *bd) { @@ -709,7 +742,10 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); - +#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT + do_fixup_by_compat_u32(blob, compat, "adapter-type", + (u32)(gd->arch.sdhc_adapter), 1); +#endif do_fixup_by_compat(blob, compat, "status", "okay", 4 + 1, 1); } diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index a13769ea25..dc32aec9b2 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -1588,6 +1588,9 @@ int mmc_start_init(struct mmc *mmc) if (mmc->has_init) return 0; +#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT + mmc_adapter_card_type_ident(); +#endif board_mmc_power_init(); /* made sure it's not NULL earlier */ @@ -1739,6 +1742,9 @@ static void do_preinit(void) list_for_each(entry, &mmc_devices) { m = list_entry(entry, struct mmc, link); +#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT + mmc_set_preinit(m, 1); +#endif if (m->preinit) mmc_start_init(m); } diff --git a/drivers/mmc/mmc_private.h b/drivers/mmc/mmc_private.h index 16dcf9ff61..447a7001db 100644 --- a/drivers/mmc/mmc_private.h +++ b/drivers/mmc/mmc_private.h @@ -16,6 +16,9 @@ extern int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data); extern int mmc_send_status(struct mmc *mmc, int timeout); extern int mmc_set_blocklen(struct mmc *mmc, int len); +#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT +void mmc_adapter_card_type_ident(void); +#endif #ifndef CONFIG_SPL_BUILD -- cgit v1.2.3 From 2d9ca2c72c0fce33052f78f02cdc8ad0a5cf4292 Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Wed, 22 Apr 2015 13:57:40 +0800 Subject: mmc: fsl_esdhc: Add peripheral clock support The SD clock could be generated by platform clock or peripheral clock for some platforms. This patch adds peripheral clock support for T1024/T1040/T2080. To enable it, define CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK. Signed-off-by: Yangbo Lu Cc: York Sun Cc: Pantelis Antoniou Reviewed-by: York Sun --- drivers/mmc/fsl_esdhc.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) (limited to 'drivers/mmc') diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 270ec1c1fa..c690a9722d 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -506,11 +506,47 @@ static void set_sysctl(struct mmc *mmc, uint clock) esdhc_setbits32(®s->sysctl, clk); } +#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK +static void esdhc_clock_control(struct mmc *mmc, bool enable) +{ + struct fsl_esdhc_cfg *cfg = mmc->priv; + struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; + u32 value; + u32 time_out; + + value = esdhc_read32(®s->sysctl); + + if (enable) + value |= SYSCTL_CKEN; + else + value &= ~SYSCTL_CKEN; + + esdhc_write32(®s->sysctl, value); + + time_out = 20; + value = PRSSTAT_SDSTB; + while (!(esdhc_read32(®s->prsstat) & value)) { + if (time_out == 0) { + printf("fsl_esdhc: Internal clock never stabilised.\n"); + break; + } + time_out--; + mdelay(1); + } +} +#endif + static void esdhc_set_ios(struct mmc *mmc) { struct fsl_esdhc_cfg *cfg = mmc->priv; struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; +#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK + /* Select to use peripheral clock */ + esdhc_clock_control(mmc, false); + esdhc_setbits32(®s->scr, ESDHCCTL_PCS); + esdhc_clock_control(mmc, true); +#endif /* Set the clock speed */ set_sysctl(mmc, mmc->clock); @@ -740,8 +776,13 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) } #endif +#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK + do_fixup_by_compat_u32(blob, compat, "peripheral-frequency", + gd->arch.sdhc_clk, 1); +#else do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); +#endif #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT do_fixup_by_compat_u32(blob, compat, "adapter-type", (u32)(gd->arch.sdhc_adapter), 1); -- cgit v1.2.3